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Exercise 2

Consolidate the use of arrays and memory addresses in RISC-V assembly.

  1. Open the RISC-V simulator.
  2. Transcribe the code below into the editor:
# Exercise 02
# C expression: A[12] = h + A[8]
.data
Array_A: .word 0, 10, 20, 30, 40, 50, 60, 70,
80, 90, 100, 110, 120, 130, 140, 150
.text
main:
addi s2, zero, 1 # h = 1
la s3, Array_A # s3 = base address of array A
lw t0, 32(s3) # t0 = A[8] (32 = 4 * 8)
add t0, s2, t0 # t0 = h + A[8]
sw t0, 48(s3) # A[12] = t0 (48 = 4 * 12)

The Array_A vector has 16 integers, each occupying 4 bytes, stored sequentially in memory. The base address is assigned by the assembler at 0x10010000.

The la instruction is a pseudo-instruction translated by the assembler into two real instructions: auipc and addi, which load the base address into the register.

In the DATA section, array elements are stored in memory cells organized in a matrix layout. The base address of the array is 0x10010000:

Row address(+0)(+4)(+8)(+12)(+16)(+20)(+24)(+28)
0x10010000Array_A[0]Array_A[1]Array_A[2]Array_A[3]Array_A[4]Array_A[5]Array_A[6]Array_A[7]
0x10010020Array_A[8]Array_A[9]Array_A[10]Array_A[11]Array_A[12]Array_A[13]Array_A[14]Array_A[15]

Each array element occupies 4 bytes. To find the address of an element, add the row address to the column offset.

For example, to locate Array_A[11]:

  • It is in the second row, column offset +12.
  • Row address: 0x10010020
  • Offset +12 = 0xC in hexadecimal
  • Sum: 0x10010020 + 0xC = 0x1001002C

Or calculated from the base address:

0x10010000 + (4 × 11) = 0x10010000 + 44 = 0x10010000 + 0x2C = 0x1001002C

General formula: (base address in hex) + (4 × array index in decimal) = (target address)

The values defined in Array_A are written in decimal in the source code, but stored in memory in hexadecimal. For example:

  • Array_A[8] in the code is 80 (decimal).
  • In memory it appears as 0x00000050.

According to the code, register s2 holds the value 1 and will be added to the contents of Array_A[8]. The result will be stored in Array_A[12].

The la (load address) instruction is a pseudo-instruction that the assembler translates into a sequence of auipc (Add Upper Immediate to PC) and addi instructions in RISC-V. This sequence loads the base address of Array_A into register s3.

Run the program step by step using the Run One Step button. For each instruction, fill in the table below whenever a register or data memory position is modified.

Fill in the table below

  • Fill in the PC with the instruction address and copy the Instruction column exactly as it appears in the simulator. Only fill in fields that are modified.
  • For pseudo-instructions, the simulator shows the real instruction in the Basic column and the original form in the Source column. Copy the Basic value into the Instruction column and the Source value into the Pseudo-instruction column. Leave the pseudo column blank for non-pseudo instructions.
  • If you need more rows, click Add row. Verification only runs when all rows are filled, if nothing appears after clicking Check, it means there are still empty rows.
Before After executing the instruction
PC Instruction Pseudo-instruction x5x18x19 0x10010000 ... 0x10010020 ... 0x10010030 ...
(t0)(s2)(s3) Array_A[0] 1st row col(+0) Array_A[8] 2nd row col(+0) Array_A[12] 2nd row col(+16)
0x000000000x000000000x00000000 0x00000000 0x00000050 0x00000078
0x00400000 addi s2 zero 1 0x00000001
0x00400004 auipc x19 64528 la s3 Array_A 0x10010004
0x00400008 addi x19 x19 -4 0x10010000

Tip: in the print dialog, select A2 paper size for best results.